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  <title>DSpace Collection:</title>
  <link rel="alternate" href="http://dspace.ensta.edu.dz/jspui/handle/123456789/86" />
  <subtitle />
  <id>http://dspace.ensta.edu.dz/jspui/handle/123456789/86</id>
  <updated>2026-10-10T23:50:38Z</updated>
  <dc:date>2026-10-10T23:50:38Z</dc:date>
  <entry>
    <title>Design and Implementation of a Real-Time Monitoring and Supervision System for a Grid-Connected Photovoltaic Power Plant</title>
    <link rel="alternate" href="http://dspace.ensta.edu.dz/jspui/handle/123456789/441" />
    <author>
      <name>KHALED, Chahine</name>
    </author>
    <author>
      <name>ADDALA, Abderrahim</name>
    </author>
    <author>
      <name>DERMOUCHE, Reda (Directeur de thèse)</name>
    </author>
    <author>
      <name>CHOUDER, Aissa (Directeur de thèse)</name>
    </author>
    <author>
      <name>DROUICHE, Imane (Directeur de thèse)</name>
    </author>
    <id>http://dspace.ensta.edu.dz/jspui/handle/123456789/441</id>
    <updated>2026-10-07T08:51:40Z</updated>
    <published>2025-01-01T00:00:00Z</published>
    <summary type="text">Title: Design and Implementation of a Real-Time Monitoring and Supervision System for a Grid-Connected Photovoltaic Power Plant
Authors: KHALED, Chahine; ADDALA, Abderrahim; DERMOUCHE, Reda (Directeur de thèse); CHOUDER, Aissa (Directeur de thèse); DROUICHE, Imane (Directeur de thèse)
Abstract: This End-of-Study Project presents the design and implementation of a real-time monitoring&#xD;
and supervision system tailored for large-scale grid-connected photovoltaic systems. As the integration&#xD;
of renewable energy into power systems grows, maintaining consistent performance&#xD;
and ensuring operational reliability becomes essential. The work addresses the need for a robust&#xD;
and centralized platform—based on SCADA architecture—that enables continuous oversight of&#xD;
photovoltaic systems, enabling early detection of irregularities, efficient decision-making, and&#xD;
enhanced energy yield.&#xD;
The proposed system facilitates real-time data acquisition and visualization, giving operators&#xD;
access to crucial information such as energy production levels, system efficiency, and the status&#xD;
of system components. It further supports predictive analysis, and fault detection and diagnosis,&#xD;
enabling timely intervention and minimizing system downtime. By aligning the system's architecture&#xD;
with established performance metrics and supervisory principles, the study ensures that&#xD;
operators can both monitor and evaluate the plant's behaviour in real-time.&#xD;
Furthermore, the work emphasizes the significance of modular architecture, accessibility, and&#xD;
clarity in monitoring tools, ensuring they serve as decision-support systems rather than passive&#xD;
displays. This work ultimately contributes to improving the management of photovoltaic power&#xD;
plants by offering a scalable and user-focused solution that enhances operational awareness, responsiveness,&#xD;
and long-term energy performance.
Description: Projet de fin d’étude d'ingeniorat: Systèmes Embarqués:Alger: Ecole Nationale Supérieure des Technologie Avancées: 2025</summary>
    <dc:date>2025-01-01T00:00:00Z</dc:date>
  </entry>
  <entry>
    <title>Automatic Extraction of the Inference Structure of a CNN as a DAG for Temporal Analysis  of Many-Core Systems</title>
    <link rel="alternate" href="http://dspace.ensta.edu.dz/jspui/handle/123456789/440" />
    <author>
      <name>LOUNNACI, Sarah</name>
    </author>
    <author>
      <name>BENDOUDA, Djamila (Directeur de thèse)</name>
    </author>
    <author>
      <name>HLADIK, Pierre-Emmanuel (Directeur de thèse)</name>
    </author>
    <author>
      <name>MAIZA, Claire (Directeur de thèse)</name>
    </author>
    <id>http://dspace.ensta.edu.dz/jspui/handle/123456789/440</id>
    <updated>2026-10-07T08:42:50Z</updated>
    <published>2025-01-01T00:00:00Z</published>
    <summary type="text">Title: Automatic Extraction of the Inference Structure of a CNN as a DAG for Temporal Analysis  of Many-Core Systems
Authors: LOUNNACI, Sarah; BENDOUDA, Djamila (Directeur de thèse); HLADIK, Pierre-Emmanuel (Directeur de thèse); MAIZA, Claire (Directeur de thèse)
Abstract: Convolutional Neural Networks (CNNs) have become indispensable in Artificial In-&#xD;
telligence applications due to their ability to automatically extract hierarchical features.&#xD;
However, when deployed in real-time and embedded systems, accuracy is not the only&#xD;
metric of interest. In such environments, timing predictability and the guarantee of meet-&#xD;
ing strict deadlines are essential. This work addresses this challenge by bridging Deep&#xD;
Learning inference with real-time analysis through the systematic transformation of CNN&#xD;
models into Directed Acyclic Graphs (DAGs).&#xD;
The primary contribution of this project is the design of MIND Model Inference Net-&#xD;
work Designer software, which automatically extracts the inference structure of a CNN&#xD;
and converts it into a DAG compatible with the MIA Multicore Interference Analysis&#xD;
tool. To capture different execution strategies, we developed a set of novel and innova-&#xD;
tive regrouping policies, such as Macroscopic Layer-Wise Modeling (MLWM), Structured&#xD;
Spatial Partitioning (SSP), Redundant Convolution via Channel Tiling (RCCT), and&#xD;
Dense Fusion (DF). These policies balance computation, memory access, and communi-&#xD;
cation overheads in parallel, making it possible to analyze their impact on the many-core&#xD;
Kalray MPPA architectures.&#xD;
Furthermore, we proposed architecture-aware cost for Kalray’s architectures: Bostan&#xD;
256 cores and Coolidge 80 cores with TCA co-processor. By formalizing the Worst-Case&#xD;
Execution Time (WCET) and Worst-Case Memory Access (WCMA) at different preci-&#xD;
sions FP32, FP16, INT8, we provided a relatively accurate computation model that en-&#xD;
ables Worst-Case Response Time (WCRT) computation through MIA. The testing phase&#xD;
validates our methodology with a prototype CNN and multiple parameter variations,&#xD;
highlighting the trade-offs between speedup, compute efficiency, interference, memory&#xD;
transfer costs, etc. This work demonstrates the feasibility of systematically analyzing CNNs for Real-&#xD;
Time Systems on many-core processors, achieving a complete workflow: from CNN to&#xD;
 DAG extraction, to regrouping policy application, cost modeling, YAML generation, and&#xD;
MIA-based timing analysis. The outcomes not only validate the proposed approach but&#xD;
also open perspectives for extending analysis to larger models.
Description: Projet de fin d’étude d'ingeniorat: Systèmes Embarqués:Alger: Ecole Nationale Supérieure des Technologie Avancées: 2025</summary>
    <dc:date>2025-01-01T00:00:00Z</dc:date>
  </entry>
  <entry>
    <title>Développement d’un Système Embarqué  dans un Tableau de Bord pour Scooter</title>
    <link rel="alternate" href="http://dspace.ensta.edu.dz/jspui/handle/123456789/439" />
    <author>
      <name>BOUCHIBANE, Amine</name>
    </author>
    <author>
      <name>CHOUAF, Seloua (Directeur de thèse)</name>
    </author>
    <author>
      <name>MAOUCHE, Idris (Directeur de thèse)</name>
    </author>
    <id>http://dspace.ensta.edu.dz/jspui/handle/123456789/439</id>
    <updated>2026-10-07T08:15:31Z</updated>
    <published>2025-01-01T00:00:00Z</published>
    <summary type="text">Title: Développement d’un Système Embarqué  dans un Tableau de Bord pour Scooter
Authors: BOUCHIBANE, Amine; CHOUAF, Seloua (Directeur de thèse); MAOUCHE, Idris (Directeur de thèse)
Abstract: Ce projet a pour objectif le développement d’un système embarqué intégré à un&#xD;
tableau de bord pour scooter. La solution établit une communication bidirec-&#xD;
tionnelle avec un smartphone via Bluetooth pour l’échange de données, tout en&#xD;
proposant une interface utilisateur moderne sur un écran tactile.
Description: Projet de fin d’étude d'ingeniorat: Systèmes Embarqués:Alger: Ecole Nationale Supérieure des Technologie Avancées: 2025</summary>
    <dc:date>2025-01-01T00:00:00Z</dc:date>
  </entry>
  <entry>
    <title>Test and Validation of a motorcycle dashboard</title>
    <link rel="alternate" href="http://dspace.ensta.edu.dz/jspui/handle/123456789/395" />
    <author>
      <name>ELABASSI, Mohammed Yassine</name>
    </author>
    <author>
      <name>KHOULA, Omar</name>
    </author>
    <author>
      <name>ZELLAT, Khadidja (Directeur de thèse)</name>
    </author>
    <author>
      <name>MAOUCHE, Idris (Directeur de thèse)</name>
    </author>
    <id>http://dspace.ensta.edu.dz/jspui/handle/123456789/395</id>
    <updated>2025-11-06T10:22:57Z</updated>
    <published>2025-01-01T00:00:00Z</published>
    <summary type="text">Title: Test and Validation of a motorcycle dashboard
Authors: ELABASSI, Mohammed Yassine; KHOULA, Omar; ZELLAT, Khadidja (Directeur de thèse); MAOUCHE, Idris (Directeur de thèse)
Abstract: It’s a presentation of the design and implementation of a Hardware-in-the-Loop (HIL) bench dedicated to testing a motorcycle dashboard. This project aims to simulate various motorcycle conditions by generating realistic analog and digital signals to verify the proper functioning of the dashboard in a controlled environment using the actual tools of Vector Informatik that are made for automotive test and validation. The bench consists of a microcontroller-based system (ESP32 and Arduino Nano), DAC modules, relays, and signal conditioning circuits, all coordinated together by custom firmware. This work highlights the challenges of embedded systems integration, real-time signal emulation and the importance of verification tools in the development lifecycle of automotive-grade electronics
Description: Projet de fin d’étude d'ingeniorat: Systèmes Embarqués: Alger: Ecole Nationale Supérieure des Technologie Avancées: 2025</summary>
    <dc:date>2025-01-01T00:00:00Z</dc:date>
  </entry>
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