Analysis of Convolutional Neural Networks on Real-Time Multi-Core Embedded Platforms

Abstract

This article provides a bibliographical study of Convolutional Neural Networks (CNNs) architecture analysis and methods of deploying them in embedded real-time multi-core platforms. We first review the main structures of CNNs and their representation as Directed Acyclic Graphs (DAGs). We then analyse the real-time execution challenges on multi-core architectures, focusing on shared-resource interference, common arbitration mechanisms, and discuss how Worst-Case Execution Time (WCET) and Worst-Case Response Time (WCRT) can be estimated using tools like OTAWA and MIA. Next, we survey existing analytical methods for timing analysis of CNN inference, including model representation formats and toolchains. Finally, we outline our ongoing research effort developing the MIND (Model Inference Network Designer) tool to automatically extract CNN structure into a DAG compatible with the MIA timing- analysis tool, and we end this article by giving some perspectives.